1. Field of the Invention
The present invention relates to a display device and a method of fabricating a display device, and more particularly, to an active matrix electroluminescent display device and a method of fabricating an active matrix electroluminescent display device.
2. Discussion of the Related Art
As the need for displaying information increases, requirements for flat panel displays having thin profiles, lightweight, and lower power consumption also increases. Accordingly, various flat panel display (FPD) devices, such as liquid crystal display (LCD) devices, plasma display panel (PDP) devices, field emission display (FED) devices, and electro-luminescence display (ELD) devices, have been developed.
The ELD devices make use of an electro-luminescence phenomenon in which light is generated when an electrical signal is supplied to a fluorescent substance. The ELD devices can be classified into inorganic electroluminescent display (IELD) devices and organic electroluminescent display (OELD) devices, depending upon a source used to excite carriers. The OELD devices have been increasingly used due to their ability to display a wide range of visible wavelengths of light, and because of their high brightness and low voltage requirements.
Since the OELD devices are a self-luminescent, they have high contrast ratios and are suitable for ultra-thin type display devices. In addition, since they have simple manufacturing processes, the degree of environmental contamination is relatively low. Furthermore, the OELD devices have response times of only a few microseconds (μs), thereby making the OELD devices suitable for displaying moving images, and they have non-limiting viewing angles and are stable at low operating temperatures. In addition, since the OELD devices are driven with a relatively low voltage between 5V and 15V, manufacturing and design of their driving circuits are easy.
Although structures of the OELD devices are similar to that of the IELD devices, the light-emitting theory of the OELD devices is different from that of the IELD devices. For example, the OELD devices emit light by recombination of electrons and holes, and thus they are commonly referred to as organic light emitting diode devices. Recently, active matrix types of ELD devices having a plurality of pixels arranged in a matrix configuration and thin film transistors connected thereto have been commonly applied to the flat panel display devices. The active matrix type has also been applied to the OELD devices, and this is commonly referred to as an active matrix OELD device.
FIG. 1 is a cross sectional view of an OELD device according to the related art. In FIG. 1, first and second substrates 10 and 60 that are spaced apart from each other and have inner surfaces facing each other have a plurality of sub-pixel regions. Then, an array layer AL, which includes thin film transistors (TFTs) T within each of the pixel regions P, is formed along an inner surface of the first substrate 10, and a first electrode 48 connected to the TFT T is formed on the array layer AL within each of the pixel regions P. Next, red, green, and blue organic electroluminescent (EL) layers 54 are alternately formed on the first electrode 48, and a second electrode 56 is formed on the organic EL layers 54. Accordingly, the first and second electrodes 48 and 58 and the organic EL layer 54 interposed therebetween constitute an organic EL diode E. The organic EL device shown in FIG. 1 is a bottom-type OELD where light is emitted from the organic EL layer 54 through the first electrode 48 and out of the first substrate 10.
In FIG. 1, the second substrate 70 is used as an encapsulation substrate and includes a concave portion 62 at an inner center portion of the second substrate 70, wherein the concave portion 62 is filled with a moisture absorbent material, such as a desiccant 64, that removes moisture and oxygen to protect the organic EL diode E. In addition, the inner surface of the second substrate 70 is spaced apart from the second electrode 56, wherein the first and second substrates 10 and 70 are attached with a sealant 70 along a peripheral portion of the first and second substrates 10 and 70 for encapsulation.
FIG. 2A is a plan view of a basic pixel structure of an active matrix OELD device according the related art. In FIG. 2A, a gate line 22 is disposed along a first direction, and a power line 28 and a data line 42 are disposed along a second direction perpendicularly crossing the gate line 22, whereby the power line 28 and the data line 42 define a pixel region P by the crossing of the gate line 22. A switching thin film transistor TS is disposed near a crossing of the gate and data lines 22 and 42, and a driving thin film transistor TD is located adjacent to the switching thin film transistor TS within the pixel region P. In addition, a first electrode 48 of a light emitting diode is connected to the driving thin film transistor TD in the pixel region P.
A storage capacitor CST is disposed over the power line 28 and includes a capacitor electrode 16 that functions as a first storage electrode and a portion of the power line 28 that functions as a second storage electrode. Although not shown, an organic electroluminescent layer and a second electrode are sequentially disposed on the first electrode 48 to form a light emitting diode (LED) E. Thus, the area where the first electrode 48 is disposed can be commonly referred to as an organic electroluminescent area.
In FIG. 2A, the switching thin film transistor (TFT) TS includes a switching gate electrode 23 that extends from the gate line 22, and a switching semiconductor layer 31 that is integrally formed with the capacitor electrode 16. The switching TFT TS also includes a switching source electrode 35a that extends from the data line 42, and a switching drain electrode 35b that is spaced apart from the switching source electrode 35a across the switching gate electrode 23. The switching source and drain electrodes 35a and 35b contact the switching semiconductor layer 31 through contact holes.
The driving thin film transistor (TFT) TD includes a driving gate electrode 20 and a driving semiconductor layer 14, wherein the driving semiconductor layer 14 is simultaneously formed with the capacitor electrode 16 and the switching semiconductor layer 31, but is spaced apart from each of the capacitor electrode 16 and the switching semiconductor layer 31. The driving gate electrode 20 is in contact with the switching drain electrode 35b through a contact hole. Additionally, the driving TFT TD includes a driving source electrode 38 and a driving drain electrode 40 that are both formed having an island pattern shape over the driving semiconductor layer 14. The driving drain electrode 40 and the driving source electrode 38 contact the driving semiconductor layer 14 through a first contact hole 32 and through a second contact hole 34, respectively.
In FIG. 2A, a power electrode 26 that extends from the power line 28 is overlapped by a portion of the driving source electrode 38 such that driving source electrode 38 contacts the power electrode 26 through a third contact hole 36. The first electrode 48 of the LED E overlaps the driving drain electrode 40 and contacts the driving drain electrode 40 through a fourth electrode 46 that may corresponds to the first contact hole 32.
FIG. 2B is a cross sectional view along IIb—IIb of FIG. 2A showing a driving thin film transistor, a storage capacitor, and a light emitting diode according to the related art. In FIG. 2B, a buffer layer 12 is formed along an entire surface of a substrate 10. A driving thin film transistor TD and a storage capacitor CST are disposed on the buffer layer 12, and a light emitting diode (LED) E is formed over the substrate 10.
Specifically, a driving semiconductor layer 14 and a capacitor electrode 16 are formed on the buffer layer 12. The driving semiconductor layer 14 includes an active area 14a within a middle portion of the driving semiconductor layer 14, and source and drain areas 14b and 14c along opposing sides of the active area 14a. The driving semiconductor layer 14 and the capacitor electrode 16 are spaced apart from each other, but are simultaneously formed of the same material. Then, a gate insulating layer 18 and a driving gate electrode 20 are sequentially formed ion the active area 14a of the driving semiconductor layer 14, such the source and drain areas 14b and 14c are not covered by the gate insulating layer 18 and driving gate electrode 20.
Next, a first passivation layer 24 is formed on the buffer layer 12 to cover the driving semiconductor layer 14, the capacitor electrode 16, the gate insulating layer 18, and the driving gate electrode 20. Then, a power line 28 and a power electrode 26 are formed on the first passivation layer 24, wherein the power line 28 overlaps the capacitor electrode 16 such that the capacitor electrode 16 and the power line 28 constitute a storage capacitor CST. Next, a second passivation layer 30 is formed on the first passivation layer 24 to cover the power electrode 26 and the power line 28. The first and second passivation layers 24 and 30 have first and contact holes 32 and 34 that expose the drain area 14c and the source area 14b of the driving semiconductor layer 14, respectively. The second passivation layer 30 has also a third contact hole 36 that exposes a portion of the power electrode 26.
Then, driving source and drain electrodes 38 and 40 are formed on the second passivation layer 30. The driving drain electrode 40 contacts the drain area 14c through the first contact hole 32, and the driving source electrode 38 contacts the source area 14b and the power electrode 26 through the second contact hole 34 and through the third contact hole 36, respectively.
Next, a third passivation layer 44, which has a fourth contact hole 46 exposing the driving drain 40, is formed on the second passivation layer 30 to cover the driving source and drain electrodes 38 and 40. The driving semiconductor layer 14, the driving gate electrode 20, and the driving source and drain electrodes 38 and 40 constitute the driving thin film transistor TD.
Then, a first electrode 48 of a transparent conductive material is formed on the third passivation layer 44, and contacts the driving drain 40 through the fourth contact hole 46. Next, an interlayer insulator 50 is formed on the third passivation layer 44 to cover the first electrode 48, and includes an opening that exposes a portion of the first electrode 48. Next, an organic electroluminescent (EL) layer 54 is formed to contact the first electrode 48 through the opening formed in the interlayer insulator 50, and a second electrode 56 of an opaque conductive material is formed on the interlayer insulator 50 and on the organic EL layer 54. Accordingly, the first electrode 48 functions as an anode and the second electrode 56 function as a cathode, wherein the first and second electrodes 48 and 56 and the organic EL layer 54 constitute the light emitting diode (LED) E.
In OELD devices according to the devices shown in FIGS. 1, 2A, and 2B, a TFT array part AL (in FIG. 1) and an organic light emitting (LED) diode E (in FIGS. 2A and 2B) are formed over the same substrate, such as the first substrate 10, and an additional second substrate, such as the second substrate 70, is attached to the first substrate for encapsulation. However, when the TFT array part and the organic LED diode are formed on one substrate in this way, production yield of the OELD device is determined by a product of the TFT's yield and the organic LED diode's yield. Since the organic LED diode's yield is relatively low, the production yield of the overall OELD device is limited by the organic LED diode's yield. For example, even when a TFT is properly fabricated, the OELD device using a thin film of about 1000 angstroms (Å) thickness can be determined to be inferior due to the defects of an organic electroluminescent layer. Thus, resulting in loss of materials and increased production costs.
In general, the OELD devices are classified into bottom emission-types and top emission-types according to an emission direction of light used for displaying images. Bottom emission-type OELD devices have the advantage of high encapsulation stability and high process flexibility. However, the bottom emission-type OELD devices are ineffective as high resolution devices since the disposition of the thin film transistors and the storage capacitor formed on the substrate results in poor aperture ratios. In contrast to bottom emission-type OELD devices, top emission-type OELD devices have a higher expected life span due to their simpler circuit layouts that yield high aperture ratios. However, in top emission-type OLED devices, the cathode is generally formed on an organic electroluminescent layer. As a result, transmittance and optical efficiency of a top emission-type OELD device are reduced because of a limited number of materials that may be selected as the cathode. If a thin film-type passivation layer is formed on the cathode to prevent the reduction of the light transmittance, then the thin film-type passivation layer can still fail in preventing the infiltration of exterior air into the organic electroluminescent layer.
Additionally, since the active matrix OELD devices of the related art include the thin film transistors and the storage capacitors within the light-emitting direction, they have decreased luminance areas and reduced aperture ratios. In order to overcome these problems, current density is increased to provide an increase in luminance of the device, thereby causing a decreased life span of the OELD device.